The computers that run artificial intelligence, machine learning and other advanced applications require computational assistance from small, fast, energy-efficient memory chips located near, or even inside, the CPU. These memory chips must be programmable and work very quickly to keep up with the CPU.
In this role today’s computers typically use static random-access memory (SRAM), a technology that is fast and compact, but has the drawback of being power-hungry.
Now, a team led by Stanford professor Shan Wang has published a Nature Electronics paper demonstrating an alternative technology that is just as fast as SRAM, even more compact and far more energy efficient. The new technology is called SOT-MRAM, short for spin-orbit torque magnetoresistive random-access memory.
Wang’s approach combines MRAM — a new type of “spintronic” memory just now being commercialized — and SOT circuity. The SOT circuitry is based on the interaction between an ultrathin wire of tantalum — a heavy metal common in electronic devices — and a nanosized stack of other metals and insulators, in particular, an alloy of cobalt, iron and boron.
By sending small jolts of electricity through the tantalum, the magnetic components in the alloy can be switched to face upward or downward. In computer terms, they can be programmed as the electrical representations of the ones and zeroes needed to store digital data. Favorably, SOT-MRAM is what engineers call a non-volatile form of memory, which means that it can store data even when power to the device is turned off.
SOT technology has excellent electrical efficiency, but to replace SRAM it must also be small. Wang’s team achieved the necessary compactness by carefully engineering the thickness of the various layers in the device to make it writable using just two electrical terminals. Previously, SOT-MRAM was thought to require three terminals.
Speed is the ultimate prerequisite. Existing MRAM technologies, which take 10 to 20 nanoseconds to write a zero or a one, are too slow for data-intensive computing applications. But Wang’s research shows that SOT-MRAM can write a zero or one in a nanosecond or less — a ten to twenty-fold improvement in speed. This sub-nanosecond threshold will allow SOT-MRAM to keep pace with today’s ever-faster CPUs, deeper learning neural networks and massive databases.
Wang cautions that his current experiments are in the very early stages and SOT technology is years away from commercialization. But, he said, it already outperforms a competing form of MRAM known as spin-transfer torque (STT) that has been widely commercialized already.
The next challenge is to develop manufacturing techniques and more potent SOT materials to produce SOT-MRAM in the profound numbers needed to make the technology commercially viable. That’s no easy task. “If you don’t get the metal layers exactly right, you destroy the device,” he says.
Still, Wang thinks those manufacturing challenges are solvable and that SOT-MRAM’s size, speed and energy efficiency should make spin-orbit torque memory very attractive to the industry. “There are a lot of new ideas pouring out in this area,” he says, “I’m very optimistic this memory will be commonly used in numerous widgets.”
Co-authors include Noriyuki Sato, who conducted the research as part of his PhD dissertation, now at Intel; postdoc Fen Xue, now at Tsinghua University; consulting professor Robert M. White; and postdoc Chong Bi.
Funding for this research was provided by Taiwan Semiconductor Manufacturing Company (TSMC), Stanford SystemX Alliance, Stanford Center for Magnetic Nanotechnology, NSF Center for Energy Efficient Electronics Science and ASCENT, one of six centers in JUMP, a Semiconductor Research Corporation (SRC) program sponsored by DARPA.